NCERT Plus Two (Class 12) Physics • Chapter 14

Semiconductor Electronics: Materials, Devices and Simple Circuits

Q: Distinguish between conductors, insulators, and semiconductors on the basis of energy band diagrams.

• Conductors (Metals): Valence Band and Conduction Band overlap (or CB partially filled) → E_g ≈ 0 ; large free electrons. • Semiconductors: Small forbidden gap E_g 3 eV (Diamond ~5.4 eV ); practically zero electrons reach CB.

Q: How does the electrical conductivity of a pure semiconductor change with temperature? Contrast this with a metallic conductor.

In a semiconductor , raising temperature exponentially breaks more covalent bonds across small E_g , rapidly increasing carrier density nᵢ → conductivity increases (negative temperature coefficient of resistivity, α 0 ).

Q: Differentiate between n-type and p-type semiconductors. Are they electrically charged? Justify.

• n-type: Doped with pentavalent Group 15 ( P, As, Sb ); majority carriers = electrons ( nₑ ≫ nₕ ); donor level E_D just below E_C . • p-type: Doped with trivalent Group 13 ( B, Al, In ); majority carriers = holes ( nₕ ≫ nₑ ); acceptor level E_A just above E_V . Charge: Both are electrically neutral because every neutral dopant atom brings equal protons and electrons.

Q: Pure Silicon has nᵢ = 1.5 × 10¹⁶ m⁻³. It is doped with Indium of concentration 5 × 10²² m⁻³. Identify the semiconductor type and calculate the electron concentration.

Indium is trivalent (Group 13) ⇒ p-type with nₕ ≈ 5 × 10²² m⁻³ . Using nₑ · nₕ = nᵢ² : nₑ = (1.5 × 10¹⁶)² 5 × 10²² = 2.25 × 10³² 5 × 10²² = 4.5 × 10⁹ m⁻³ .

Q: Draw the V-I characteristic curve of a p-n junction diode in forward and reverse bias. Explain why forward current is in mA while reverse current is in μA.

Forward bias ( p→+, n→− ): Barrier decreases, depletion narrows → majority diffusion produces steep exponential current in mA after knee voltage ( 0.7 V Si). Reverse bias ( p→−, n→+ ): Barrier increases, depletion widens → majority blocked; only tiny minority drift current in μA flows until breakdown V_br .

Q: Two ideal diodes D₁ and D₂ are connected in parallel branches with 10 Ω resistors across a 5 V DC battery: D₁ is forward biased and D₂ is reverse biased. Find the total current from the battery.

For ideal diodes: forward-biased D₁ acts as short wire ( 0 Ω ), while reverse-biased D₂ acts as open switch ( ∞ Ω , I₂ = 0 ). Total current flows only through D₁ branch: I = 5 V 10 Ω = 0.5 A .

Q: With a neat circuit diagram and input/output waveforms, explain the working of a Full-Wave Centre-Tap p-n junction diode rectifier.

Circuit: AC primary feeds a centre-tapped secondary winding (ends A, B; centre tap T). Diodes D₁ (at A) and D₂ (at B) join together to load R_L returning to T. Working: During + half-cycle (A positive, B negative), D₁ is forward biased (conducts through R_L ) and D₂ is reverse biased. During − half-cycle (A negative, B positive), D₂ conducts while D₁ blocks — pushing current in the same direction through R_L . Output: Unidirectional full-wave pulses at double frequency ( 2f = 100 Hz for 50 Hz input).

Energy bands in solids, intrinsic semiconductors, p-type vs n-type doping, p-n junction barrier, forward/reverse diode V-I curve & half/full-wave rectifiers.

📄 Official NCERT Textbook PDF

Topic 14.2: Classification by Energy Bands: Metals, Insulators & Semiconductors

Imagine a double-decker KSRTC bus parked in Thiruvananthapuram! Everyone crammed tight on the lower deck (Valence Band) cannot walk around at all; only passengers who climb up to the open upper deck (Conduction Band) can stride down the aisle carrying electricity! In metals, the two decks overlap; in insulators, a three-storey cliff blocks the climb; in semiconductors, it is a tiny hop (~1 eV) that heat or light can jump!

METALS (CONDUCTORS)E_g ≈ 0 (Valence & Conduction bands overlap) • High σ ~ 10²–10⁸ S/m

SEMICONDUCTORSSmall gap E_g < 3 eV (Si: 1.1 eV, Ge: 0.7 eV) • σ INCREASES when heated!

INSULATORSHuge gap E_g > 3 eV (Diamond ~5.4 eV) • Practically zero free electrons!

🧠 Memory Trick: Watch temperature! Heating a Metal makes atoms jostle and hurts flow (α > 0), while heating a Semiconductor lifts MORE electrons over E_g and boosts flow (α < 0)!

💡 Simple Kid-Check: Inside a lone isolated atom, electrons sit on sharp energy rungs (like Bohr orbits). Pack 10²³ Silicon atoms shoulder-to-shoulder into a crystal, and those sharp rungs blur into wide energy ribbons called bands — separated by a forbidden gap E_g where no electron may sit!

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Valence Band (E_V) & Conduction Band (E_C): The highest energy band filled with valence electrons at 0 K is the Valence Band. The next higher band where electrons move freely to conduct current is the Conduction Band.
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Forbidden Energy Gap (E_g = E_C − E_V):
• Metals: CB is partially filled OR overlaps VB (E_g = 0) → instant current even at tiny voltage.
• Semiconductors: Small finite gap E_g < 3 eV (Ge = 0.7 eV, Si = 1.1 eV). Room temperature or light kicks electrons across!
• Insulators: Wide gap E_g > 3 eV (e.g. Diamond 5.4 eV) — room temperature cannot jump it.

Material Type	Band Gap `E_g`	Resistivity `ρ (Ω·m)`	Effect of Heating (`T ↑`)
Metals (Cu, Al)	`0 eV` (overlap)	`10⁻² – 10⁻⁸`	`ρ` increases (`σ` drops, `α > 0`)
Semiconductors (Si, Ge)	`< 3 eV` (`1.1`, `0.7 eV`)	`10⁻⁵ – 10⁶`	`ρ` decreases (`σ` rises, `α < 0`)
Insulators (Glass, Diamond)	`> 3 eV` (`~5.4 eV`)	`10¹¹ – 10¹⁹`	Practically non-conducting

🧒 Super-Easy Example: What maximum wavelength of light can excite an electron across Silicon's band gap (E_g = 1.1 eV)?
λ_max = hcE_g ≈ 1240 eV·nm1.1 eV ≈ 1127 nm (near-infrared — so Silicon responds to all visible light!).

Watch two classic 1-mark Kerala DHSE traps: (1) Heating a copper wire and a silicon wafer simultaneously causes resistance of copper to increase (α > 0) while resistance of silicon decreases (α < 0)! (2) Do NOT mix up E_g values: Germanium = 0.7 eV, Silicon = 1.1 eV, and Insulators have E_g > 3 eV!

Topic 14.3: Intrinsic Semiconductors: Electrons, Holes & Conductivity

Imagine every seat in an Ernakulam cinema row is completely full! Suddenly one person stands up and walks into the aisle. Now the neighbour slides sideways into that empty seat, and the next neighbour slides too — making the empty seat appear to march backward down the row! In pure Silicon, every freed electron leaves behind a missing-bond vacancy called a hole, and BOTH carry current together!

INTRINSIC PURITYPure Group-14 crystal (Si or Ge), 4 covalent bonds per atom. At T = 0 K → Insulator!

EQUAL CARRIERSThermal bond breaking spawns pairs → nₑ = nₕ = nᵢ always!

ADDITIVE CURRENTI = Iₑ + Iₕ (move opposite ways, yet currents ADD!) • σ = e(nₑμₑ + nₕμₕ)

🧠 Memory Trick: At 0 K, pure Silicon is a dead insulator! Above 0 K, every liberated electron creates one twin hole (nₑ = nₕ = nᵢ), and negative electrons + positive holes drift opposite ways to ADD currents!

💡 Simple Kid-Check: Is a "hole" an actual new subatomic particle like a positron? No! A hole is just an empty covalent bond seat in the valence band that behaves like an effective positive charge +e because bound electrons keep hopping into it!

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Tetrahedral Crystal at 0 K: Each Silicon or Germanium atom shares its 4 valence electrons with 4 neighbours in rigid covalent bonds. Zero free carriers exist at absolute zero (0 K) → pure intrinsic semiconductor acts as a perfect insulator!
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Electron-Hole Pair Generation (T > 0 K): Room heat snaps a few covalent bonds. Each snapped bond creates 1 free conduction electron (−e) AND 1 vacancy/hole (+e effective), guaranteeing exact equality: nₑ = nₕ = nᵢ (where nᵢ is intrinsic carrier concentration).
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Why Currents Add Up: Under an external electric field E, negative electrons drift opposite to E while positive holes drift along E. Since opposite charges moving in opposite directions create conventional current in the SAME direction, total current is I = Iₑ + Iₕ!

🧒 Super-Easy Example: Pure Silicon at 300 K has intrinsic carrier concentration nᵢ = 1.5 × 10¹⁶ m⁻³. How many electrons and holes exist per cubic metre?
Since every thermal break makes one pair: nₑ = 1.5 × 10¹⁶ m⁻³ and nₕ = 1.5 × 10¹⁶ m⁻³! (Tiny compared to copper's ~10²⁸ m⁻³ — which is why we need doping next!)

Watch three classic Kerala HSE traps: (1) At T = 0 K, a pure semiconductor is an insulator (infinite resistance), NOT a superconductor! (2) Even though nₑ = nₕ in an intrinsic semiconductor, electron current exceeds hole current (Iₑ > Iₕ) because free conduction electrons have higher mobility (μₑ > μₕ) than valence-hopping holes!

Topic 14.4: Extrinsic Semiconductors: p-Type (Trivalent) vs n-Type (Pentavalent)

Plain steamed rice feels bland, yet add just one pinch of Kerala spice masala per bowl and the whole dish wakes up! Pure Silicon has too few carriers (10¹⁶ per m³) to power chips, so engineers sprinkle 1 impurity atom per million Silicon atoms — called doping! Add Group 15 Phosphorus (5 outer hands) and you flood the crystal with free electrons (n-type); add Group 13 Boron (3 outer hands) and you flood it with holes (p-type)!

n-TYPE (GROUP 15 DONOR)Pentavalent P, As, Sb (5 valence e⁻) → Majority: e⁻ (nₑ ≫ nₕ); Donor level E_D near E_C

p-TYPE (GROUP 13 ACCEPTOR)Trivalent B, Al, In (3 valence e⁻) → Majority: h⁺ (nₕ ≫ nₑ); Acceptor level E_A near E_V

MASS-ACTION & NEUTRALITYnₑ · nₕ = nᵢ² ALWAYS! • Both p-type & n-type are ELECTRICALLY NEUTRAL (Q = 0)!

🧠 Memory Trick: "P-A-S" (P, As, Sb = 5 valence → n-type Donors); "B-A-I" (B, Al, In = 3 valence → p-type Acceptors)! And NEVER forget: net charge on BOTH is ZERO!

💡 Simple Kid-Check: Wait — if n-type is packed with extra free negative electrons, why isn't an n-type Silicon bar negatively charged? Because every Phosphorus atom you added brought 15 protons AND 15 electrons (+15 − 15 = 0)! Every extra electron is balanced by an immobile +1 Phosphorus ion anchored in the lattice!

Feature	n-Type Semiconductor	p-Type Semiconductor
Dopant Group	Pentavalent (Group 15: `P, As, Sb`)	Trivalent (Group 13: `B, Al, In`)
Role & Band Level	Donor (`E_D` ~`0.01–0.05 eV` below `E_C`)	Acceptor (`E_A` ~`0.01–0.05 eV` above `E_V`)
Majority Carriers	Electrons (`nₑ ≈ N_D ≫ nₕ`)	Holes (`nₕ ≈ N_A ≫ nₑ`)
Net Electric Charge	Zero (Electrically Neutral!)	Zero (Electrically Neutral!)

🧒 Super-Easy Mass-Action Numerical: Pure Silicon (nᵢ = 1.5 × 10¹⁶ m⁻³) is doped with Indium atoms at N_A = 4.5 × 10²² m⁻³. Identify type and find minority carrier density:
• Indium is trivalent (Group 13) → p-type, with hole density nₕ ≈ 4.5 × 10²² m⁻³.
• Using nₑ · nₕ = nᵢ²: nₑ = (1.5 × 10¹⁶)²4.5 × 10²² = 2.25 × 10³²4.5 × 10²² = 5.0 × 10⁹ m⁻³ (electrons suppressed 10 trillion-fold!).

Kerala DHSE's #1 most repeated 1-mark trap: "What is the net charge on a p-type or n-type semiconductor?" Answer: ZERO (Electrically Neutral)! "p" stands for positive majority carriers (holes) and "n" stands for negative majority carriers (electrons) — NOT net static charge on the crystal! Also notice doping boosts majority carriers while suppressing minority carriers via nₑ · nₕ = nᵢ²!

Topic 14.6: p-n Junction Formation, Depletion Region & Barrier Potential

Imagine two crowded neighbouring towns in Kerala: Hole-Puram (p-side) and Electron-Nagar (n-side)! The instant you open the border road, holes spill across to the n-side and electrons spill into the p-side (diffusion) — just like perfume spreading! Yet each traveller leaves behind a fixed, anchored charged atom right along the border, building an invisible electric security fence (Depletion Region & Barrier Potential) that halts further crossing!

2 COMPETING FLOWSDiffusion (majority crosses border) vs Drift (internal field pushes minority back). Equilibrium: I_diff = I_drift!

DEPLETION LAYERSpace-charge border (~0.1–1 μm) devoid of mobile carriers — holds ONLY fixed ⊖ ions (p) & ⊕ ions (n)!

BARRIER POTENTIAL (V₀)V₀ ≈ 0.7 V (Si) and 0.3 V (Ge) • Internal E points n → p!

🧠 Memory Trick: Watch the ion signs! On the p-side sit immobile NEGATIVE (⊖) acceptor ions; on the n-side sit immobile POSITIVE (⊕) donor ions — so internal electric field points n → p!

💡 Simple Kid-Check: Why is the border zone called the Depletion Region? Because it has been depleted (emptied!) of mobile electrons and holes — all that stays behind is a wall of fixed, unmovable charged impurity ions creating an uphill barrier V₀!

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Diffusion Starts First: Due to huge concentration difference across the junction, electrons diffuse n → p and holes diffuse p → n. When an electron leaves the n-side, it exposes a fixed positively charged donor ion (⊕); when it lands on the p-side, it turns an acceptor atom into a fixed negative ion (⊖).
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Internal Electric Field & Drift: This double layer of fixed charges sets up an internal electric field pointing from n-side (+) toward p-side (−). That field blocks majority diffusion while sweeping minority carriers across (drift current).
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Dynamic Equilibrium: The barrier stops growing once Diffusion Current = Drift Current (I_net = 0). Typical barrier potential: V₀ ≈ 0.7 V for Silicon, ~0.3 V for Germanium! Also note: heavier doping → narrower depletion layer!

🧒 Super-Easy Example: A Silicon p-n junction has barrier potential V₀ = 0.7 V across a depletion width d = 0.5 μm = 5 × 10⁻⁷ m. How strong is the hidden electric field inside the junction?
E = V₀d = 0.7 V5 × 10⁻⁷ m = 1.4 × 10⁶ V/m (pointing from n to p — over a million volts per metre!).

Two sneaky DHSE traps: (1) Can you measure the 0.7 V barrier potential simply by touching a voltmeter across an open p-n diode? NO! Contact potentials at the metal leads cancel it out — V₀ only shows up as the turn-on knee when forward-biased! (2) Watch the ion polarity: fixed ions inside the depletion layer are negative on the p-side and positive on the n-side (opposite of the majority carrier names!).

Topic 14.6: Forward Bias vs Reverse Bias V-I Characteristics of a Diode

Think of a p-n junction diode as a one-way flapper valve inside your bicycle tyre pump! Push air the right way (Forward Bias: P to +, N to −), the flap swings wide open as soon as you beat a gentle spring tension (0.7 V) and current surges! Push the wrong way (Reverse Bias: P to −, N to +), the flap slams tighter shut until extreme voltage snaps it in breakdown!

FORWARD BIAS (p → +, n → −)Barrier drops (V₀ − V), depletion narrows → large mA majority current after knee (0.7 V Si / 0.3 V Ge)!

REVERSE BIAS (p → −, n → +)Barrier rises (V₀ + V), depletion widens → tiny μA minority drift current until breakdown V_br!

DYNAMIC RESISTANCEr_d = ΔVΔI (~few Ω forward; ~MΩ reverse). Ideal diode: 0 Ω (FB) vs ∞ Ω (RB)!

🧠 Memory Trick: P-to-Positive = PASS (Forward)! Diode arrow triangle points P → N in the exact direction easy forward current flows!

💡 Simple Kid-Check: Connecting + of the battery to p-side repels positive holes toward the junction, squashing the depletion wall flat so current glides through! Flipping the battery pulls holes and electrons AWAY from the border, stretching the depletion wall wider and blocking majority current!

Property	Forward Bias (`p→+, n→−`)	Reverse Bias (`p→−, n→+`)
Effective Barrier	Decreases (`V₀ − V`)	Increases (`V₀ + V`)
Depletion Width	Decreases (narrows)	Increases (widens)
Conducting Carriers	Majority carriers (diffusion)	Minority carriers (drift)
Current Scale & Resistance	Large `mA`, very low `r_d (~10 Ω)`	Tiny `μA`, very high `(~MΩ)`

🧒 Super-Easy Diode Circuit Check: A Silicon diode (V_knee = 0.7 V) is connected in series with a 430 Ω resistor across a 5.0 V battery.
• If Forward Biased (p to +): I = 5.0 − 0.7430 = 4.3430 = 0.01 A = 10 mA!
• If Reverse Biased (p to −): Depletion widens → ideal circuit current = 0 mA (entire 5.0 V drops across the diode)!

Watch three top DHSE V-I graph traps: (1) Always label axes carefully — Forward current is in milliamperes (mA) while Reverse current is in microamperes (μA) (1000× smaller)! (2) A diode does NOT obey Ohm's law (V = IR linear) — it is a classic non-ohmic device! (3) Reverse saturation current barely changes with voltage, yet increases sharply with temperature (more thermal minority carriers!).

Topic 14.7: Half-Wave & Full-Wave Junction Diode Rectifiers with Filter Capacitor

Your home wall socket in Kerala swings AC back and forth 50 times every second, yet your phone battery demands steady one-way DC — feeding raw AC directly would charge and uncharge it endlessly! Inside every mobile charger sits a Rectifier made of p-n diodes that turns two-way AC into one-way pulsating DC, followed by a Filter Capacitor that smooths out the bumps like a water tank!

HALF-WAVE RECTIFIER1 diode conducts ONLY on + half-cycle → 50% wasted; output ripple freq = f_in (50 Hz)!

FULL-WAVE RECTIFIER2 diodes + centre-tap (D₁ on +, D₂ on −) → BOTH halves flow one way! Ripple freq = 2f_in (100 Hz)!

CAPACITOR FILTER (C)Connected in PARALLEL with load R_L — charges to peak V_m, discharges slowly (RC ≫ T) → smooth DC!

🧠 Memory Trick: For 50 Hz Kerala AC mains: Half-wave outputs 50 Hz pulses (1 hump per cycle), Full-wave outputs 100 Hz pulses (2 humps per cycle)!

💡 Simple Kid-Check: Think of a rectifier like pumping water into an overhead rooftop tank with a one-way valve: a Half-Wave pump only pushes water on downward strokes; a Full-Wave pump pushes on BOTH downward and upward strokes; and the Filter Capacitor acts like the wide tank holding water steady between strokes!

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Half-Wave Rectifier (1 Diode): Transformer secondary feeds AC through one diode D and load resistor R_L. During positive half-cycles, D is forward biased (conducts); during negative half-cycles, D is reverse biased (blocks completely). Output pulses match input frequency f!
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Full-Wave Centre-Tap Rectifier (2 Diodes): Centre tap T splits the secondary winding into two anti-phase halves. During the + half-cycle, top end A is positive → D₁ conducts while D₂ blocks. During the − half-cycle, bottom end B turns positive → D₂ conducts while D₁ blocks. Notice BOTH push current the same direction through R_L, doubling output ripple frequency to 2f!
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Capacitor Filter (C in Parallel with R_L): As rectifier voltage rises, capacitor C charges rapidly to peak V_m. As diode voltage dips, diode turns reverse-biased and C discharges very slowly through R_L (long time constant τ = R_L C ≫ T), keeping load voltage nearly flat steady DC!

🧒 Super-Easy Frequency & Filter Check: Kerala AC mains operates at f = 50 Hz:
• Output ripple frequency of Half-Wave Rectifier = f = 50 Hz.
• Output ripple frequency of Full-Wave Rectifier = 2f = 100 Hz (twice as fast, much easier for capacitor C to smooth flat!).

Watch three classic Kerala DHSE rectifier traps: (1) If input AC frequency is 50 Hz, Half-Wave ripple is 50 Hz whereas Full-Wave ripple is 100 Hz (NOT 50 Hz!). (2) In a circuit diagram, a Filter Capacitor MUST be connected in PARALLEL across the load R_L (in series it blocks DC completely!). (3) In a centre-tap full-wave rectifier, NEVER forget to label the centre tap ground/return wire going through R_L — without it, current has no return path!

Solved Previous Year Questions (Kerala DHSE & NCERT)

Q1 (Kerala HSE March • 3 Marks): Distinguish between conductors, insulators, and semiconductors on the basis of energy band diagrams.

• Conductors (Metals): Valence Band and Conduction Band overlap (or CB partially filled) → E_g ≈ 0; large free electrons.
• Semiconductors: Small forbidden gap E_g < 3 eV (Si: 1.1 eV, Ge: 0.7 eV); thermal energy excites electrons at room temp.
• Insulators: Wide forbidden gap E_g > 3 eV (Diamond ~5.4 eV); practically zero electrons reach CB.

Q2 (Kerala HSE Say • 2 Marks): How does the electrical conductivity of a pure semiconductor change with temperature? Contrast this with a metallic conductor.

In a semiconductor, raising temperature exponentially breaks more covalent bonds across small E_g, rapidly increasing carrier density nᵢ → conductivity increases (negative temperature coefficient of resistivity, α < 0).
In a metal, carrier density is already huge; heating increases lattice vibrations/collisions → conductivity decreases (α > 0).

Q3 (Kerala HSE March • 2 Marks): Differentiate between n-type and p-type semiconductors. Are they electrically charged? Justify.

• n-type: Doped with pentavalent Group 15 (P, As, Sb); majority carriers = electrons (nₑ ≫ nₕ); donor level E_D just below E_C.
• p-type: Doped with trivalent Group 13 (B, Al, In); majority carriers = holes (nₕ ≫ nₑ); acceptor level E_A just above E_V.
Charge: Both are electrically neutral because every neutral dopant atom brings equal protons and electrons.

Q4 (NCERT / DHSE Numerical • 2 Marks): Pure Silicon has nᵢ = 1.5 × 10¹⁶ m⁻³. It is doped with Indium of concentration 5 × 10²² m⁻³. Identify the semiconductor type and calculate the electron concentration.

Indium is trivalent (Group 13) ⇒ p-type with nₕ ≈ 5 × 10²² m⁻³.
Using nₑ · nₕ = nᵢ²:
nₑ = (1.5 × 10¹⁶)²5 × 10²² = 2.25 × 10³²5 × 10²² = 4.5 × 10⁹ m⁻³.

Q5 (Kerala HSE March • 3 Marks): Explain the formation of the depletion region and barrier potential in a p-n junction.

1. Upon joining p and n sides, concentration gradient drives diffusion (electrons n → p, holes p → n).
2. Migrating carriers leave behind immobile ⊕ donor ions on n-side and ⊖ acceptor ions on p-side, forming a carrier-free depletion region (~0.5 μm).
3. Fixed ions set up an internal field (n → p) and barrier potential (~0.7 V Si, ~0.3 V Ge), driving minority drift until I_diffusion = I_drift at equilibrium.

Q6 (Kerala HSE Say • 3 Marks): Draw the V-I characteristic curve of a p-n junction diode in forward and reverse bias. Explain why forward current is in mA while reverse current is in μA.

Forward bias (p→+, n→−): Barrier decreases, depletion narrows → majority diffusion produces steep exponential current in mA after knee voltage (0.7 V Si).
Reverse bias (p→−, n→+): Barrier increases, depletion widens → majority blocked; only tiny minority drift current in μA flows until breakdown V_br.

Q7 (Kerala HSE Model • 2 Marks): Two ideal diodes D₁ and D₂ are connected in parallel branches with 10 Ω resistors across a 5 V DC battery: D₁ is forward biased and D₂ is reverse biased. Find the total current from the battery.

For ideal diodes: forward-biased D₁ acts as short wire (0 Ω), while reverse-biased D₂ acts as open switch (∞ Ω, I₂ = 0).
Total current flows only through D₁ branch: I = 5 V10 Ω = 0.5 A.

Q8 (Kerala HSE March • 4 Marks): With a neat circuit diagram and input/output waveforms, explain the working of a Full-Wave Centre-Tap p-n junction diode rectifier.

Circuit: AC primary feeds a centre-tapped secondary winding (ends A, B; centre tap T). Diodes D₁ (at A) and D₂ (at B) join together to load R_L returning to T.
Working: During + half-cycle (A positive, B negative), D₁ is forward biased (conducts through R_L) and D₂ is reverse biased. During − half-cycle (A negative, B positive), D₂ conducts while D₁ blocks — pushing current in the same direction through R_L.
Output: Unidirectional full-wave pulses at double frequency (2f = 100 Hz for 50 Hz input).

Q9 (Kerala HSE March • 2 Marks): What is the role of a capacitor filter in a rectifier circuit? How is it connected relative to the load resistor R_L?

Connection: Connected in parallel across the load resistor R_L.
Working: The capacitor charges rapidly to peak voltage V_m during each diode conduction pulse and discharges very slowly through R_L (since R_L C ≫ T) during valleys — filtering pulsating DC into near-constant steady DC.